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LTC3560 2.25MHz, 800mA Synchronous Step-Down Regulator in ThinSOT
FEATURES

DESCRIPTIO
High Efficiency: Up to 95% Low Output Ripple (<20mVP-P): Burst Mode(R) Operation: IQ = 16A 2.5V to 5.5V Input Voltage Range 2.25MHz Constant Frequency Operation Synchronizable to External Clock No Schottky Diode Required Stable with Ceramic Capacitors Low Dropout Operation: 100% Duty Cycle 0.6V Reference Allows Low Output Voltages Shutdown Mode Draws < 1A Supply Current 2% Output Voltage Accuracy Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Low Profile (1mm) ThinSOTTM Package
The LTC (R)3560 is a high efficiency monolithic synchronous buck regulator using a constant frequency, current mode architecture. Supply current during operation is only 16A, dropping to <1A in shutdown. The 2.5V to 5.5V input voltage range makes the LTC3560 ideally suited for single Li-Ion/Li-Polymer battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Switching frequency is internally set at 2.25MHz, allowing the use of small surface mount inductors and capacitors. For noise sensitive applications the LTC3560 can be externally synchronized from 1MHz to 3MHz. Burst Mode operation is inhibited during synchronization or when the SYNC/MODE pin is pulled high, preventing low frequency ripple from interfering with audio circuitry. The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Low output voltages are easily supported with the 0.6V feedback reference voltage. The LTC3560 is available in a low profile (1mm) ThinSOT package.
, LTC, LT and Burst Mode are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6580258, 5481178, 5994885, 6304066, 6498466, 6611131
APPLICATIO S

Cellular Telephones Wireless and DSL Modems Digital Still Cameras Media Players Portable Instruments
TYPICAL APPLICATIO
100 90 80 70
EFFICIENCY (%)
VIN 2.7V TO 5.5V
2.2H CIN 10F CER VIN LTC3560 RUN SYNC/MODE VFB GND 806k 255k
3405A F01a
60 50 40 30 20 10 0 0.1 1 VIN = 3.6V VIN = 4.2V VIN = 5.5V 10 100 LOAD CURRENT (mA) 0.01
SW
10pF
VOUT 2.5V COUT 10F CER
Figure 1a. High Efficiency Step-Down Converter
Figure 1b. Efficiency vs Load Current
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1 0.1
POWER LOSS (W)
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0.001
0.0001 1000
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1
LTC3560
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW RUN 1 GND 2 SW 3 6 SYNC/MODE 5 VFB 4 VIN
Input Supply Voltage .................................. - 0.3V to 6V SYNC/MODE, RUN, VFB Voltages ............... - 0.3V to VIN SW Voltage (DC) ......................... - 0.3V to (VIN + 0.3V) P-Channel Switch Source Current (DC) (Note 6) ... 1.2A N-Channel Switch Sink Current (DC) (Note 6) ....... 1.2A Peak SW Sink and Source Current (Note 6)........... 2.1A Operating Temperature Range (Note 2) .. - 40C to 85C Junction Temperature (Note 3) ............................ 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
S6 PACKAGE 6-LEAD PLASTIC TSOT-23 TJMAX = 125C, JA = 250C/ W
ORDER PART NUMBER LTC3560ES6
S6 PART MARKING LTCFY
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 3.6V unless otherwise specified.
SYMBOL IVFB IPK VFB VFB VLOADREG VIN IS PARAMETER Feedback Current Peak Inductor Current Regulated Feedback Voltage Reference Voltage Line Regulation Output Voltage Load Regulation Input Voltage Range Input DC Bias Current Pulse Skipping Mode Burst Mode(R) Operation Shutdown Oscillator Frequency SYNC Frequency Range RDS(ON) of P-Channel FET RDS(ON) of N-Channel FET SW Leakage RUN Threshold RUN Leakage Current SYNC/MODE Leakage Current Soft-Start Time VFB from 10% to 90% Full Scale ISW = 100mA ISW = -100mA VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V

CONDITIONS
MIN 1.0

TYP 1.5 0.6 0.04 0.5
MAX 30 2.0 0.612 0.4 5.5
UNITS nA A V %/V % V A A A MHz MHz A V A V A ms
VIN = 3V, VFB = 0.5V, Duty Cycle < 35% (Note 4) VIN = 2.5V to 5.5V (Note 4)
0.588
2.5 200 16 0.1
(Note 5) VFB = 0.63V, Mode = High, ILOAD = 0A VFB = 0.63V, Mode = Low, ILOAD = 0A VRUN = 0V, VIN = 5.5V VFB = 0.6V

300 30 1 2.7 3 0.35 0.35 1 1.5 1 1.5 1 1.2
fOSC fSYNC RPFET RNFET ILSW VRUN IRUN ISYNC/MODE tSOFTSTART
1.8 1
2.25 0.23 0.21 0.01
0.3 0.3 0.6
1 0.01 1.0 0.01 0.9
VSYNC/MODE SYNC/MODE Threshold
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The LTC3560E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
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LTC3560
ELECTRICAL CHARACTERISTICS
Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: LTC3560: TJ = TA + (PD)(250C/W) Note 4: The LTC3560 is tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 6: Guaranteed by long-term current density limitations. Note 7: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure1a Except for the Resistive Divider Resistor Values) Efficiency vs Input Voltage
100 95 90 EFFICIENCY (%)
EFFICIENCY (%)
IOUT = 100mA IOUT = 10mA IOUT = 1mA IOUT = 900mA
85 80 75 70 65 60 55 50
60 50 40 30 20 10 VIN = 3.6V VIN = 4.2V VIN = 5.5V 1000
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EFFICIENCY (%)
IOUT = 0.1mA
VOUT = 1.8V 2.5 3 4 4.5 3.5 INPUT VOLTAGE (V) 5 5.5
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Efficiency vs Output Current
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA) 1000
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VOUT = 1.3V
70 EFFICIENCY (%) 60 50 40 30 20 10 VOUT = 1.8V 0 1 0.1 10 100 OUTPUT CURRENT (mA) VIN = 4.2V VIN = 3.6V 1000
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REFERENCE VOLTAGE (V)
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Efficiency vs Output Current
100 90 80 70 100 90 80 70 60 50 40 30 20 10
Efficiency vs Output Current
VOUT = 1.8V
VOUT = 3.3V 0 0.1 1 10 100 OUTPUT CURRENT (mA)
0 0.1
VIN = 2.7V VIN = 3.6V VIN = 4.2V VIN = 5.5V 1 10 100 OUTPUT CURRENT (mA) 1000
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Efficiency vs Output Current
100 90 80 Burst Mode OPERATION
Reference Voltage vs Temperature
0.615 0.610 0.605 0.600 0.595 0.590 0.585 -50 -25 VIN = 3.6V
PULSE SKIP MODE
50 25 75 0 TEMPERATURE (C)
100
125
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LTC3560 TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values) Oscillator Frequency vs Temperature
2.50 2.45 OSCILLATOR FREQUENCY (MHz) 2.40 2.35 2.30 2.25 2.20 2.15 2.10 2.05 2.00 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 VIN = 3.6V
OSCILLATOR FREQUENCY (MHz)
OUTPUT VOLTAGE (V)
RDS(ON) vs Input Voltage
0.40 0.35 0.30
RDS(0N) ()
0.30 MAIN SWITCH 0.25 SYNCHRONOUS SWITCH 0.20 0.15 0.10 0 1 4 3 5 2 INPUT VOLTAGE (V) 6 7
RDS(ON) ()
VIN = 2.7V
VIN = 3.6V
DYNAMIC SUPPLY CURRENT (A)
Dynamic Supply Current vs Temperature
300
DYNAMIC SUPPLY CURRENT (A)
250 200 150 100 50
VIN = 3.6V VOUT = 1.2V ILOAD = 0A
SWITCH LEAKAGE (nA)
100 80 MAIN SWITCH 60 40 20 0 -50 -25 SYNCHRONOUS SWITCH
SWITCH LEAKAGE (pA)
PULSE SKIPPING MODE
Burst Mode OPERATION 50 25 75 0 TEMPERATURE (C) 100 125
0 -50 -25
4
UW
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Oscillator Frequency vs Supply Voltage
2.4 2.3 2.2 2.1 2.0 1.9 1.8 2 2.5 3 1.84 1.83 1.82 1.81
Output Voltage vs Load Current
VIN = 3.6V
Burst Mode OPERATION 1.80 1.79 1.78 PULSE SKIP MODE
4.5 5 3.5 4 INPUT VOLTAGE (V)
5.5
6
0
200
400 600 800 LOAD CURRENT (mA)
1000
1200
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RDS(ON) vs Temperature
0.40 0.35 300 250 200
Dynamic Supply Current
VOUT = 1.2V ILOAD = 0A
0.25 0.20 0.15 0.10 0.05 0 -50 -25 0 SYNCHRONOUS SWITCH MAIN SWITCH VIN = 4.2V
PULSE SKIPPING MODE 150 100 50 Burst Mode OPERATION 0 2 2.5 3 4.5 5 3.5 4 INPUT VOLTAGE (V) 5.5 6
50 75 25 TEMPERATURE (C)
100
125
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Switch Leakage vs Temperature
140 120 1000 900 800 700 600 500 400 300 200 100 0 50 25 75 0 TEMPERATURE (C) 100 125
Switch Leakage vs Input Voltage
RUN = 0V
MAIN SWITCH
SYNCHRONOUS SWITCH
0
1
3 4 2 INPUT VOLTAGE (V)
5
6
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LTC3560 TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values) Burst Mode Operation Pulse Skipping Mode Operation
RUN 2V/DIV VOUT 1V/DIV
SW 2V/DIV VOUT 20mV/DIV AC COUPLED IL 200mA/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 25mA 2s/DIV
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Load Step
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV
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VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 0A TO 800mA PULSE SKIPPING MODE
Load Step
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 0A TO 800mA Burst Mode OPERATION
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Start-Up from Shutdown
SW 2V/DIV
VOUT 20mV/DIV AC COUPLED IL 200mA/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 25mA 500ns/DIV
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IL 500mA/DIV
VIN = 3.6V VOUT = 1.8V ILOAD = 800mA
500s/DIV
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Load Step
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV
Load Step
VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 50mA TO 800mA PULSE SKIPPING MODE
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VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 100mA TO 800mA PULSE SKIPPING MODE
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Load Step
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 50mA TO 800mA Burst Mode OPERATION
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Load Step
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV 20s/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 100mA TO 800mA Burst Mode OPERATION
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LTC3560
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above 1.5V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1A supply current. Do not leave RUN floating. GND (Pin 2): Ground Pin. SW (Pin 3): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. VIN (Pin 4): Main Supply Pin. Must be closely decoupled to GND, Pin 2, with a 10F or greater ceramic capacitor. VFB (Pin 5): Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. SYNC/MODE (Pin 6): External Clock Synchronization and Mode Select Input. To synchronize with an external clock, apply a clock with a frequency between 1MHz and 3MHz. To select pulse skipping mode, tie to VIN. Grounding this pin selects Burst Mode operation. Do not leave this pin floating.
FU CTIO AL DIAGRA
SYNC/MODE 6 SLOPE COMP OSC
FREQ SHIFT VFB 5 0.6V
- + - +
EA 0.4V
VIN RUN 1 0.6V REF
SHUTDOWN
6
-
IRCMP
+
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0.65V OSC
4 VIN EN SLEEP
- +
-
BURST Q Q SWITCHING LOGIC AND BLANKING CIRCUIT
ICOMP
+
5
S R
RS LATCH
ANTISHOOTTHRU
3 SW
2 GND
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LTC3560
OPERATIO
Main Control Loop The LTC3560 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.6V reference, which in turn, causes the EA amplifier's output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. The main control loop is shut down by grounding RUN, resetting the internal soft-start. Re-enabling the main control loop by pulling RUN high activates the internal soft-start, which slowly ramps the output voltage over approximately 0.9ms until it reaches regulation. Burst Mode Operation The LTC3560 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply connect the SYNC/MODE pin to GND. To disable Burst Mode operation and enable PWM pulse skipping mode, connect the SYNC/MODE pin to VIN or drive it with a logic high (VMODE > 1.5V). In this mode, the efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 100mA. The advantage of pulse skipping mode is lower output ripple and less interference to audio circuitry.
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(Refer to Functional Diagram)
When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 150mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 16A. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier's output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. Frequency Synchronization When the LTC3560 is clocked by an external source, Burst Mode operation is disabled; the LTC3560 then operates in PWM pulse-skipping mode. In this mode, when the output load is very low, current comparator ICOMP may remain tripped for several cycles and force the main switch to stay off for the same number of cycles. Increasing the output load slightly allows constant frequency PWM operation to resume. This mode exhibits low output ripple as well as low audio noise and reduced RF interference while providing reasonable low current efficiency. Dropout Operation As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. Another important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3560 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information section).
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LTC3560
OPERATIO
Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this
APPLICATIO S I FOR ATIO
The basic LTC3560 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 1H to 3.3H. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in equation 1. A reasonable starting point for setting ripple current is IL = 320mA (40% of 800mA).
V 1 VOUT 1 - OUT IL = ( f)(L) VIN
The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple
Table 1. Representative Surface Mount Inductors
MANUFACTURER Toko PART NUMBER A960AW-1R2M-518LC A960AW-2R3M-518LC A997AS-3R3M-DB318L CDRH2D11/HP-1R5 CDRH3D11/HP-1R5 CDRH2D18/HP-2R2 CDRH2D14-3R3 VLF3010AT-1R5M1R2 VLF3010AT-2R2M1R0 D01608C-222 LP01704-222M SD3112-2R2 B82470A1222M MAX DC VALUE CURRENT DCR HEIGHT 1.2H 1.8A 46m 1.8mm 2.3H 1.5A 63m 1.8mm 3.3H 1.2A 70m 1.8mm 1.5H 1.35A 64m 1.2mm 1.5H 2A 80m 1.2mm 2.2H 1.6A 48m 2.0mm 3.3H 1.2A 100m 1.55mm 1.5H 1.2A 68m 1.0mm 2.2H 1.0A 100m 1.0mm 2.2H 2.3A 70m 3.0mm 2.2H 2.4A 120m 1.0mm 2.2H 1.1A 140m 1.2mm 2.2H 1.6A 90m 1.2mm
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(Refer to Functional Diagram)
results in a reduction of maximum inductor peak current for duty cycles > 40%. However, the LTC3560 uses a patented scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles.
current to prevent core saturation. Thus, a 960mA rated inductor should be enough for most applications (800mA + 160mA). For better efficiency, choose a low DC-resistance inductor. The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 200mA. Lower inductor values (higher IL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection
(1)
Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate much energy, but generally cost
LTC3560
APPLICATIO S I FOR ATIO
more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3560 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3560 applications. CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by:
[VOUT (VIN - VOUT )]1/ 2 CIN required IRMS IOMAX
VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer's ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple VOUT is determined by:
1 VOUT IL ESR + 8fC OUT
where f = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since IL increases with input voltage. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power
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supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3560's control loop does not depend on the output capacitor's ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming The output voltage is set by a resistive divider according to the following formula:
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R2 VOUT = 0.6 V 1+ R1
(2)
The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 2.
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LTC3560
APPLICATIO S I FOR ATIO
0.6V VOUT 5.5V R2 VFB LTC3560 GND
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R1
Figure 2. Setting the LTC3560 Output Voltage
Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3560 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 3.
1 VOUT = 2.5V Burst Mode OPERATION
0.1
POWER LOST (W)
0.01
0.001 VIN = 3.6V VIN = 4.2V VIN = 5.5V 1 10 100 LOAD CURRENT (mA) 1000
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0.0001 0.1
Figure 3. Power Lost vs Load Current
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1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is "chopped" between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 - DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Charateristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations In most applications the LTC3560 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3560 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C,
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LTC3560
APPLICATIO S I FOR ATIO
both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3560 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(JA) where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: T J = TA + TR where TA is the ambient temperature. As an example, consider the LTC3560 in dropout at an input voltage of 2.7V, a load current of 800mA and an ambient temperature of 70C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70C is approximately 0.31. Therefore, power dissipated by the part is: PD = ILOAD2 * RDS(ON) = 198mW For the SOT-23 package, the JA is 250C/ W. Thus, the junction temperature of the regulator is: TJ = 70C + (0.198)(250) = 120C which is below the maximum junction temperature of 125C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ILOAD * ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state
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value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 * CLOAD). Thus, a 10F capacitor charging to 3.3V would require a 250s rise time, limiting the charging current to about 130mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3560. These items are also illustrated graphically in Figures 4 and 5. Check the following in your layout: 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the (-) plates of CIN and COUT as close as possible. 5. Keep the switching node, SW, away from the sensitive VFB node. Design Example As a design example, assume the LTC3560 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.8A but most of the time it will be in
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LTC3560
APPLICATIO S I FOR ATIO
-
VOUT COUT
+
L1
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 4. LTC3560 Layout Diagram
VOUT
PIN 1 L1 LTC3560 SW
Figure 5. LTC3560 Suggested Layout
standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using equation (1),
L=
V 1 VOUT 1 - OUT ( f)(IL ) VIN
Substituting VOUT = 2.5V, VIN = 4.2V, IL = 320mA and f = 2.25MHz in equation (3) gives:
L= 2.5V 2.5V 1- 1.4H 2.25MHz(320mA) 4.2V
A 1.5H inductor works well for this application. For best efficiency choose a 960mA or greater inductor with less than 0.2 series resistance.
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1 RUN SYNC/MODE LTC3560 2 GND VFB VIN CIN VIN 5 R2 3 SW 4 CFWD R1 6
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VIA TO GND
R1 VIA TO VIN R2 CFWD VIN VIA TO VOUT
COUT GND
CIN
3560 F05
CIN will require an RMS current rating of at least 0.4A ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.1. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, choose R1 = 309k. R2 can then be calculated from equation (2) to be: V R2 = OUT - 1 R1= 978.5k ; use 976k 0.6 Figure 6 shows the complete circuit along with its efficiency curve.
(3)
LTC3560
APPLICATIO S I FOR ATIO
EFFICIENCY (%)
VIN 2.7V TO 4.2V
4 CIN* 10F CER
VIN LTC3560 RUN
SW
3
1.5H** 10pF
1 6
SYNC/MODE VFB GND 2
5 976k 309k
3560 F06a
* TDK C2012X5R0J106M **TDK VLF3010AT-1R5N1R2
Figure 6a
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 2.5V ILOAD = 100mA TO 800mA Burst Mode OPERATION
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Figure 6c
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100 90 80 70
VOUT 2.5V COUT* 10F CER
W
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VOUT = 2.5V Burst Mode OPERATION PULSE SKIPPING
60 50 40 30 20 10 0 0.1
VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA) 1000
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Figure 6b
VOUT 200mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV 20s/DIV VIN = 3.6V VOUT = 2.5V ILOAD = 100mA TO 800mA PULSE SKIPPING MODE
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Figure 6d
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LTC3560
APPLICATIO S I FOR ATIO
EFFICIENCY (%)
VIN 2.7V TO 4.2V
4 CIN* 10F CER
VIN LTC3560 RUN
SW
3
1H** 10pF
1 6
3MHz CLK
SYNC/MODE VFB GND 2
5 301k 301k
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*TDK C2012X5R0J106M **MURATA LQH32CN1R0M33
Figure 7a
VOUT 100mV/DIV AC COUPLED IL 500mA/DIV ILOAD 500mA/DIV
VIN = 3.6V 20s/DIV VOUT = 1.2V ILOAD = 300A TO 800mA
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Figure 7c
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100 90 80 70 60 50 40 30 20 10 0 1 10 100 LOAD CURRENT (mA) VIN = 2.7V VIN = 3.6V VIN = 4.2V 1000
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VOUT 1.2V COUT* 10F CER
Figure 7b
VOUT 100mV/DIV AC COUPLED IL 500mA/DIV
ILOAD 500mA/DIV
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20s/DIV VIN = 3.6V VOUT = 1.2V ILOAD = 0mA TO 500mA
Figure 7d
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LTC3560
PACKAGE DESCRIPTIO
0.62 MAX
0.95 REF
3.85 MAX 2.62 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC 1.00 MAX DATUM `A'
0.30 - 0.50 REF
NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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S6 Package 6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE ID 0.95 BSC 0.30 - 0.45 6 PLCS (NOTE 3) 0.80 - 0.90 0.01 - 0.10 0.09 - 0.20 (NOTE 3) 1.90 BSC
S6 TSOT-23 0302
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LTC3560 RELATED PARTS
PART NUMBER LTC3405/LTC3405A LTC3406/LTC3406B LTC3407/LTC3407-2 LTC3409 LTC3410/LTC3410B LTC3411 LTC3412 LTC3441/LTC3442 LTC3443 LTC3531/LTC3531-3 LTC3531-3.3 LTC3532 LTC3548/LTC3548-1 LTC3548-2 LTC3561 DESCRIPTION 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converters 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converters Dual 600mA/800mA (IOUT), 1.5MHz/2.25MHz, Synchronous Step-Down DC/DC Converters 600mA (IOUT), 1.7MHz/2.6MHz, Synchronous Step-Down DC/DC Converter 300mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converters 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 1.2A (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converters 200mA (IOUT), 1.5MHz, Synchronous Buck-Boost DC/DC Converters 500mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter Dual 400mA/800mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converters 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter COMMENTS 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20A, ISD = <1A, ThinSOT Package 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20A, ISD = <1A, ThinSOT Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40A, ISD = <1A, MS10E, DFN Packages 96% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65A, ISD = <1A, DFN Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26A, ISD = <1A, SC70 Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD = <1A, MS10, DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD = <1A, TSSOP-16E Package 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 50A, ISD = <1A, DFN Package 95% Efficiency, VIN: 1.8V to 5.5V, VOUT(MIN): 2V to 5V, IQ = 16A, ISD = <1A, ThinSOT, DFN Packages 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 35A, ISD = <1A, MS10, DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40A, ISD = <1A, MS10E, DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 240A, ISD = <1A, DFN Package
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT 1106 * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2006

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